1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, more particularly, to an improvement in the solid diffusion method employed for the impurity doping in the process of manufacturing a semiconductor device.
2. Description of the Related Art
Recently, the demands for an integrated circuit apparatus using a semiconductor material such as Si or GaAs as the substrate are on a sharp increase, and such an integrated circuit apparatus is becoming more and more important in the industry. The conventional method of manufacturing a semiconductor integrated circuit device comprises the steps of doping a conductive impurity into the surface region of a semiconductor substrate so as to form various impurity regions, forming an interlayer insulating film, and forming a wiring layer by vapor deposition. Particularly, the step of doping a p-type or n-type impurity (conductive impurity) in the semiconductor substrate for forming a p-type or n-type impurity region is important in the device-forming process.
A solid phase diffusion method is widely known as a method of doping a conductive impurity in the field of, for example, a Si device. In this method, a silicon oxide film having a conductive impurity added thereto, i.e., doped glass, is used as a diffusion source, and the conductive impurity is introduced by thermal diffusion from the diffusion source into the surface region of a semiconductor substrate. However, since the solid phase diffusion method is inferior to the ion implantation method in the capability of controlling the impurity dosage, the general opinion acceptable in this field was that the ion implantation would be employed in place of the solid phase diffusion method. However, in accordance with the enhancement in the density of the integrated circuit, the solid phase diffusion method has been found to be suitable for achieving a three-dimensional structure and miniaturization of the element, and has come to attract attention again in this technical field.
A trench capacitor structure is employed in, for example, a DRAM because the trench capacitor structure permits substantially increasing the capacitance without increasing the area exclusively occupied by the capacitor. For forming the trench capacitor, a groove is formed in the silicon substrate surface, and the capacitor is formed along the side walls and bottom surface of the groove. In the conventional method of forming the trench capacitor, employed is an impurity diffusion from a silicon oxide film doped with arsenic for forming an n.sup.+ type diffusion layer along the surface of the groove. This diffusion method also permits forming a diffusion layer in the side walls of the groove, though such a diffusion layer cannot be formed in the ion implantation method.
It should also be noted that the solid phase diffusion method utilizing a doped glass permits achieving a shallow impurity profile in the diffusion layer, compared with the ion implantation method. Further, it is necessary to make the source and drain regions shallow in order to shorten the channel length of a MOS transistor. The solid phase diffusion method is also hopeful for meeting this requirement.
In the conventional solid phase diffusion method outlined above, the distribution of the doped impurity is determined completely by the temperature, time and atmosphere in the thermal diffusion step as well as by the kind, concentration, etc. of the impurity contained in the doped glass diffusion source. It follows that it is impossible to control the impurity diffusion as desired unless the conditions given above are changed.
This implies that impurity regions of the same impurity profile alone can be formed by a single solid phase diffusion treatment.
On the other hand, it is required in many cases to form a plurality of impurity regions having different impurity profiles or a single impurity region having locally different impurity profiles in the manufacture of a semiconductor element which has been miniaturized in recent years. It is naturally desirable to form a single impurity region or a plurality of impurity regions having different impurity profiles in a single doping step. In the conventional solid phase diffusion method, however, it is impossible to control as desired the diffusion rate in a selective manner, making it impossible to form simultaneously a shallow diffusion layer and a deep diffusion layer in a single diffusion treatment.
It is certainly possible to form a diffusion layer having locally different impurity profiles in a single diffusion treatment in the case of using as a diffusion source a doped glass containing a plurality of impurities differing from each other in the diffusion coefficient. Even in this case, however, the diffusion coefficient of each of the impurities is determined completely by the conditions such as the temperature, treating time, and atmosphere in the step of the thermal diffusion treatment. Therefor, it is impossible that the impurity diffusion profile in a semiconductor is controlled optionally and independently. It is impossible to, for example, lower selectively the diffusion rate of one of the impurities. As a result, this technique is considered presently to be of substantially no practical value, though the technique permits forming impurity regions of different diffusion profiles in a single diffusion step, making it possible to shorten and simplify the diffusion treatment.
As described above, the conventional solid phase diffusion method is defective in that the shape and impurity diffusion profile of the impurity region to be formed is determined by the diffusion coefficient inherent in the impurity used, making it impossible to control as desired the shape and impurity diffusion profile of the impurity region. This difficulty markedly narrows the scope of application of the solid phase diffusion method in the device-forming process for a high density integrated circuit.